A hot plate apparatus is present in a photo lithography section of a semiconductor manufacturing fab for numerous heat treating operations. For example, a post expose bake, PEB, operation will now be described. First, a semiconductor layer is provided with a beginning dielectric layer that will be formed with a damascene or dual damascene structure. A photo resist material, PR material, is applied as a powder coating that will form a photo mask on the beginning dielectric layer. The powder coated wafer is placed on a hot plate that is enclosed by a chamber of the hot plate apparatus.
Heat transfer from the hot plate to the powder coated wafer changes the powder form of the PR material to a fluent state, which then, solidifies to form a continuous PR layer that will subsequently form a photo mask on the beginning dielectric layer. The PR layer must conform with manufacturing specifications to have a uniform thickness and a surface profile of minimum surface roughness. The manufacturing specifications are necessary for subsequent photo lithographic processing of the PR layer to form a patterned mask for making a damascene structure or dual damascene structure in the beginning dielectric layer.
An exhaust flow of air through an exhaust opening, which regulates thermal uniformity in the chamber. The exhaust flow is through an exhaust conduit entrance, for example, through an overhead cover of the hot plate chamber.
The PEB operation eliminates standing waves in PR material to improve the surface profile. The process temperature must be uniform to provide quiescent conditions for the PR material. Thus, a process temperature control limit is a key, or primary, control limit for PEB process control. It has been found that PEB temperature is affected by exhaust flow.
Prior to the invention, the exhaust flow tended to draw particles of powder against the undersurface of the chamber cover. During run time of a PEB process, the powder particles tended to fall from the chamber cover onto a wafer. The fallen powder particles are considered to be contaminant particles on the wafer surface. Subsequent heat curing processing of the wafer caused fallen particles to become crystallized, which lowers the manufacturing yield.
The same wafer is manufactured with successive layers, one on another, that have damascene or dual damascene structures. These structures are defined by selective etching through patterned developed from respective PR layers. The same wafer will have multiple PR layers that are cured by successive PEB processes, which increases the chances for contamination due to fallen powder. Prior to the invention, the hot plate chamber would require frequent cleaning, which contributed to production down-time, while the hot plate apparatus is being cleaned.
A need has existed prior to the invention, to reduce the down time required for preventative maintenance of a hot plate apparatus.